This invention relates to chip packages which interconnect integrated circuit (IC) chips of the LSI or VLSI type to circuit packs and; more particularly, the invention relates to high-speed, high pin-out chip packages.
Various types of circuit packs are presently available. Each type or style of circuit pack, or printed wiring board, can be characterized by the particular arrangement and number of conductor layers. These layers include signal layers and separate ground and power planes, all of which are interspaced with layers of dielectric material. The transmission characteristics of these various types of circuit packs are detailed in an article by the present inventor and entitled "Transmission Properties of Various Styles of Printed Wiring Boards," Bell System Technical Journal, Vol. 58, No. 5, May-June 1979. As can be noted therein, various pulse transmission properties depend upon the type or style of circuit pack. For example, characteristic impedance is a function of intralayer conductor spacing, interlayer conductor spacing, and conductor width.
In order to attach an integrated circuit chip of the LSI or VLSI type to a circuit pack, the electrical contacts or wire bonds from the chip can be directly affixed to electrical contacts on the circuit pack. For purposes of repair and testing, however, direct mounting of the IC chip on the circuit pack is disadvantageous, since removal of the chip is difficult.
A preferable arrangement for mounting an IC chip to a circuit pack is to affix either one or plural chips onto a chip package which, in turn, is affixed to the circuit pack. Such a chip package can take the form of a mini-printed wiring board having a plurality of leads or pins, which attach to the circuit pack. Such mini-board chip packages can have a structure similar to one of the types described in the aforenoted article. The transmission properties of such a package therefore also depend on the type or style of the physical arrangement of the package. As the operating speed of an integrated circuit chip increases, the transmission properties of the chip package become an important consideration. In particular, inductive noise between the chip package and the printed wiring board limits the physical design of the chip packages. Such noise becomes a problem when the rise time of the pulse signals transmitted between the chip and printed wiring board is 5ns (5.times.10.sup.-9 sec) or less. Furthermore, as the number of pin-outs (signal, ground, and power leads) on a chip package increases, such signal distortion problems due to inductive noise are exacerbated as a result of decreased interconnector lead spacing and increased cross-talk.
The problem, then, is to design a high-speed, high pin-out chip package which has reduced inductive noise.